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Copper Foil Impedance Controlled PCB,
12um Impedance Controlled PCB
Overview of Impedance Controlled PCB
Without impedance control, significant signal reflections and signal distortions will occur, resulting in design failure. Impedance control is required for common signals, such as PCI bus, PCI-E bus, USB, Ethernet, DDR memory, LVDS signals, etc. Impedance control eventually needs to be achieved by PCB design and a higher requirement for PCB board process is also put forward too. So we need to control the impedance of wiring as per the signal integrity requirement.
The corresponding impedance value of different wirings can be obtained by calculation.
It is composed by a strip conductor and the ground plane, with dielectric in the middle. If dielectric constant, line width, and its distance to the ground plane are controllable, then its characteristic impedance is also controllable with an accuracy of ± 5%.
A stripline is a copper strip in the middle of a dielectric placed between two conductive planes. If the line thickness and width, the dielectric constant of the dielectric, and the distance between the two grounding planes are all controllable, then the characteristic impedance of the line is also controllable with an accuracy of within10%.
The structure of multilayer board
In order to control the impedance of the PCB well, we must first understand the structure of PCB.
The multi-layer board usually mentioned by us is pressed by the mutual laminating of core and a prepreg, and the core is a hard, two-side copper clad board with specific thickness, which is the basic material of printed circuit board. The so-called wetting layer constituted by prepreg acts as a bonding core, although it also has a certain initial thickness, while its thickness will somewhat vary during pressing.
Generally, the outermost two dielectric layers of the multilayer board are wetting layers, with a separate copper foil layer as the outer copper foil on the outside of these two layers. The original thickness specifications of the outer layer and inner layer of the copper foil generally are three kinds of 0.5 oz, 1 oz, 2 oz (1 oz is about 35um or 1.4mil), but after a series of surface treatment, the final thickness of the outer layer of copper foil generally will be increased by about 1 oz or so. The inner copper foil is the copper clad material on both sides of the core, its final thickness is slightly different from the original thickness, but due to the etching, it generally reduces some um.
The outermost layer of the multi-layer board is the solder mask, which is usually called "green oil" by us. Of course, it can also be yellow or other colors. The thickness of solder mask is generally difficult to accurately determined, the copper-free area on the surface is slightly thicker than the area with copper, but the copper foil is still very prominent due to the lack of copper foil thickness, we can feel it when we touch the surface of a printed circuit board with fingers.
When making the printed circuit board with a certain thickness, it is necessary to reasonably select the parameters of various materials; On the other hand, the final thickness of prepreg will be thinner than the initial thickness.
Parameters of PCBs
The PCB parameters will vary slightly from one PCB factory to another. Some parameters of BichengPCB are as follows:
Surface copper foil
There are three kinds of thicknesses for accessible surface copper foil materials: 12um, 18um and 35um. The final thicknesses after processing are about 44um, 50um and 67um.
Our common PCB substrate is IT158, the standard FR-4, two-side copper clad. The optional specifications can be determined by contact with manufacturers.
The specifications (original thicknesses) are 7628H (0.213mm), 7628 (41%) (0.185mm), 7628 (43%) (0.195mm), 2116HR (0.135mm), 2116 (0.120mm), 1080 (0.075mm) and 1060 (0.05mm). The thickness after actual pressing is usually 10-15um smaller than the original value. At most three prepregs can be used for the same wetting layer, and the thickness cannot be the same ones. At least only one prepreg can be used, but some manufacturers require to use at least two prepregs. If the thickness of prepreg is not enough, the copper foil on both sides of the core can be etched away, and then the prepregs are used to be adhered on both sides, so that a thicker wetting layer can be realized.
The thickness of solder mask on the copper foil C2 is about 8-10um. The thickness of solder mask on copper-free surface area (C1) varies based on the different thicknesses of surface copper. When the thickness of surface copper is 45um, C1 is about 13-15um, when the thickness of surface copper is 70um, C1 ≈ 17-18um.
The cross-section of conductor
We would think that the cross-section of conductor is a rectangle, but it is actually a trapezoid. Take the TOP layer as an example, when the thickness of the copper foil is 1 oz, the upper base of the trapezoid is 1 mil shorter than the lower base. For example, if the line width is 5 mil, then its upper base is about 4 mil, lower base is 5 mil. The difference between upper and lower base is related to the thickness of copper.
The dielectric constant of prepreg depends on the thickness. The dielectric constant of the CCL is related to the resin material used, the dielectric constant of FR4 material is 4.2 - 4.7 and decreases with the increasing of frequency.
Dielectric loss factor
The energy consumed by the heating of dielectric under the action of alternating electric field is called dielectric loss and it is usually expressed in terms of the dielectric loss factor, tanδ. The typical value of IT158 is 0.016.
The minimum line width and line spacing to ensure processing is: 4mil / 4mil.
Introduction of tool for impedance calculation:
We can calculate the impedance by EDA software after understanding the structure of the multilayer board and mastering the required parameters. Allegro can be used to calculate, but here we recommend another tool Polar SI9000, which is a good tool to calculate the characteristic impedance, and now many PCB factories are using this software.
When calculating the characteristic impedance of the inner signal, either differential line or single-ended line, you will find that there is only a slight difference between the calculation result of Polar SI9000 and the Allegro, which is related to some details of the processing, such as the shape of conductor cross-section. But I suggest you to choose the coated model, instead of the Surface model when calculating the characteristic impedance of the surface signal, because the existence of the solder mask is considered in this kind of model so the result will be more accurate. The following figure is the calculated result by using the Polar SI9000 in the case of considering the solder mask, and with the surface differential line impedance of 50 ohm:
As the thickness of the solder mask is difficult to control, so an approximation method can also be used, as recommended by the board factory: to subtract a specific value from the results calculated from the Surface model, it is recommended to subtract the differential impedance of 8 ohms, single-ended impedance of 2 ohms.
The requirements of differential pair impedance
(1) To determine the wiring mode, parameters and impedance calculation. Differential pair wiring is divided into two kinds of outer micro-strip line differential mode and the inner strip-line differential mode. The impedance can be calculated using the relevant impedance calculation software (such as POLAR-SI9000) and can also be calculated using the impedance calculation formula by a reasonable set of parameters.
(2) Parallel equidistant line. Determine the line width and spacing, you should strictly in accordance with the calculated line width and spacing when wiring layout, the spacing between two lines cannot be changed, that is, to maintain parallel. There are two kinds of parallel: one is wiring side-by-side layer for two lines and the other is wiring over-under layers for two lines. The latter one (that’s the inter-layer differential signal) is generally avoided as much as possible, as the laminating alignment accuracy between lamination layers is much lower than that of the same layer etching accuracy in the actual PCB fabrication, and with the loss of dielectric during laminating the spacing of differential line cannot be ensured to be equal to the thickness of the interlayer dielectric, which will cause a differential impedance change between the interlayer differential pairs. Therefore, it is recommended to use the same layer differential as far as possible.
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